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MTS001 - add custom clock configuration for MTS_MDOT_F411RE to use 26MHz XTAL
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‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_MTS_MDOT_F411RE/system_clock.c

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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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*
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* Copyright (c) 2015-2021 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/**
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* This file configures the system clock as follows:
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*-----------------------------------------------------------------------------
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* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | DEVICE_USBDEVICE=1
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* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) |
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* | 3- USE_PLL_HSI (internal 16 MHz) |
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*-----------------------------------------------------------------------------
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* SYSCLK(MHz) | 100 | 96
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* AHBCLK (MHz) | 100 | 96
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* APB1CLK (MHz) | 50 | 48
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* APB2CLK (MHz) | 100 | 96
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* USB capable | NO | YES
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*-----------------------------------------------------------------------------
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**/
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#include "stm32f4xx.h"
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#include "mbed_error.h"
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// clock source is selected with CLOCK_SOURCE in json config
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#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
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#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
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#define USE_PLL_HSI 0x2 // Use HSI internal clock
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#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
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uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
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#if ((CLOCK_SOURCE) & USE_PLL_HSI)
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uint8_t SetSysClock_PLL_HSI(void);
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
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/**
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* @brief Configures the System clock source, PLL Multiplier and Divider factors,
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* AHB/APBx prescalers and Flash settings
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* @note This function should be called only once the RCC clock configuration
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* is reset to the default reset state (done in SystemInit() function).
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* @param None
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* @retval None
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*/
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MBED_WEAK void SetSysClock(void)
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{
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#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
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/* 1- Try to start with HSE and external clock */
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if (SetSysClock_PLL_HSE(1) == 0)
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#endif
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{
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#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
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/* 2- If fail try to start with HSE and external xtal */
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if (SetSysClock_PLL_HSE(0) == 0)
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#endif
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{
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#if ((CLOCK_SOURCE) & USE_PLL_HSI)
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/* 3- If fail start with HSI clock */
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if (SetSysClock_PLL_HSI() == 0)
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#endif
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{
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{
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error("SetSysClock failed\n");
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}
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}
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}
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}
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/* Output clock on MCO2 pin(PC9) for debugging purpose */
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//HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4);
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}
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#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
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/******************************************************************************/
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/* PLL (clocked by HSE) used as System clock source */
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/******************************************************************************/
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MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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/* The voltage scaling allows optimizing the power consumption when the device is
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clocked below the maximum system frequency, to update the voltage scaling value
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regarding system frequency refer to product datasheet. */
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
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/* Get the Clocks configuration according to the internal RCC registers */
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HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
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/* PLL could be already configured by bootlader */
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if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
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// Enable HSE oscillator and activate PLL with HSE as source
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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if (bypass == 0) {
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RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
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} else {
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RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
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}
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = HSE_VALUE / 1000000; // VCO input clock = 2 MHz (8 MHz / 4)
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#if (DEVICE_USBDEVICE)
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RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192)
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#else /* DEVICE_USBDEVICE */
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RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200)
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#endif /* DEVICE_USBDEVICE */
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE)
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RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1)
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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}
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// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 100/96 MHz
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 100/96 MHz
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 50/48 MHz
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 100/96 MHz
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
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return 0; // FAIL
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}
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/* Output clock on MCO1 pin(PA8) for debugging purpose */
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//if (bypass == 0)
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// HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz with xtal
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//else
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// HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz with external clock
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return 1; // OK
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}
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
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#if ((CLOCK_SOURCE) & USE_PLL_HSI)
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/******************************************************************************/
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/* PLL (clocked by HSI) used as System clock source */
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/******************************************************************************/
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uint8_t SetSysClock_PLL_HSI(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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/* The voltage scaling allows optimizing the power consumption when the device is
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clocked below the maximum system frequency, to update the voltage scaling value
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regarding system frequency refer to product datasheet. */
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
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// Enable HSI oscillator and activate PLL with HSI as source
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8)
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#if (DEVICE_USBDEVICE)
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RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192)
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#else /* DEVICE_USBDEVICE */
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RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200)
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#endif /* DEVICE_USBDEVICE */
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE)
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RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1)
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
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return 0; // FAIL
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}
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/* Output clock on MCO1 pin(PA8) for debugging purpose */
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//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
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return 1; // OK
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}
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */

‎targets/targets.json

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"HSE_VALUE=26000000"
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],
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"overrides": {
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"clock_source": "USE_PLL_HSI"
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"clock_source": "USE_PLL_HSE_XTAL"
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},
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"components_remove": [
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"FLASHIAP"

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