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Sadik.OzerSadik.Ozer
Sadik.Ozer
authored and
Sadik.Ozer
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Update system files and mbed wrappers
Signed-off-by: Sadik.Ozer <Sadik.Ozer@maximintegrated.com>
1 parent 7826582 commit 2f813fc

29 files changed

+997
-583
lines changed

‎targets/TARGET_Maxim/CMakeLists.txt

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,12 @@
1-
# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
1+
# Copyright (c) 2022 ARM Limited. All rights reserved.
22
# SPDX-License-Identifier: Apache-2.0
33

44

55
add_subdirectory(TARGET_MAX32620C EXCLUDE_FROM_ALL)
66
add_subdirectory(TARGET_MAX32625 EXCLUDE_FROM_ALL)
77
add_subdirectory(TARGET_MAX32630 EXCLUDE_FROM_ALL)
88
add_subdirectory(TARGET_MAX32660 EXCLUDE_FROM_ALL)
9+
add_subdirectory(TARGET_MAX32670 EXCLUDE_FROM_ALL)
910

1011
add_library(mbed-maxim INTERFACE)
1112

‎targets/TARGET_Maxim/TARGET_MAX32670/CMakeLists.txt

Lines changed: 36 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
1+
# Copyright (c) 2022 ARM Limited. All rights reserved.
22
# SPDX-License-Identifier: Apache-2.0
33

44
add_subdirectory(TARGET_MAX32670EVKIT EXCLUDE_FROM_ALL)
@@ -27,16 +27,20 @@ target_include_directories(mbed-max32670
2727
${MXM_PERIPH_DRIVER_DIR}/Include/${MXM_PARTNUMBER}
2828
${MXM_CMSIS_DIR}/${MXM_PARTNUMBER}/Include
2929

30+
${MXM_SOURCE_DIR}/AES
31+
${MXM_SOURCE_DIR}/CRC
3032
${MXM_SOURCE_DIR}/DMA
3133
${MXM_SOURCE_DIR}/LP
3234
${MXM_SOURCE_DIR}/FLC
3335
${MXM_SOURCE_DIR}/GPIO
34-
${MXM_SOURCE_DIR}/I2C
36+
${MXM_SOURCE_DIR}/I2C
37+
${MXM_SOURCE_DIR}/I2S
3538
${MXM_SOURCE_DIR}/ICC
3639
${MXM_SOURCE_DIR}/RTC
3740
${MXM_SOURCE_DIR}/SPI
38-
${MXM_SOURCE_DIR}/SPIMSS
41+
${MXM_SOURCE_DIR}/SYS
3942
${MXM_SOURCE_DIR}/TMR
43+
${MXM_SOURCE_DIR}/TRNG
4044
${MXM_SOURCE_DIR}/UART
4145
${MXM_SOURCE_DIR}/WDT
4246
)
@@ -59,55 +63,63 @@ target_sources(mbed-max32670
5963
watchdog_api.c
6064

6165
${MXM_CMSIS_DIR}/${MXM_PARTNUMBER}/Source/system_max32670.c
62-
66+
67+
${MXM_SOURCE_DIR}/AES/aes_me15.c
68+
${MXM_SOURCE_DIR}/AES/aes_revb.c
69+
70+
${MXM_SOURCE_DIR}/CRC/crc_me15.c
71+
${MXM_SOURCE_DIR}/CRC/crc_reva.c
72+
6373
${MXM_SOURCE_DIR}/SYS/mxc_assert.c
6474
${MXM_SOURCE_DIR}/SYS/mxc_delay.c
6575
${MXM_SOURCE_DIR}/SYS/mxc_lock.c
66-
${MXM_SOURCE_DIR}/SYS/pins_me11.c
67-
${MXM_SOURCE_DIR}/SYS/sys_me11.c
76+
${MXM_SOURCE_DIR}/SYS/pins_me15.c
77+
${MXM_SOURCE_DIR}/SYS/sys_me15.c
6878

69-
${MXM_SOURCE_DIR}/DMA/dma_me11.c
79+
${MXM_SOURCE_DIR}/DMA/dma_me15.c
7080
${MXM_SOURCE_DIR}/DMA/dma_reva.c
7181

72-
${MXM_SOURCE_DIR}/LP/lp_me11.c
82+
${MXM_SOURCE_DIR}/LP/lp_me15.c
7383

7484
${MXM_SOURCE_DIR}/FLC/flc_common.c
75-
${MXM_SOURCE_DIR}/FLC/flc_me11.c
85+
${MXM_SOURCE_DIR}/FLC/flc_me15.c
7686
${MXM_SOURCE_DIR}/FLC/flc_reva.c
87+
${MXM_SOURCE_DIR}/FLC/flc_revb.c
7788

7889
${MXM_SOURCE_DIR}/GPIO/gpio_common.c
79-
${MXM_SOURCE_DIR}/GPIO/gpio_me11.c
90+
${MXM_SOURCE_DIR}/GPIO/gpio_me15.c
8091
${MXM_SOURCE_DIR}/GPIO/gpio_reva.c
8192

82-
${MXM_SOURCE_DIR}/I2C/i2c_me11.c
93+
${MXM_SOURCE_DIR}/I2C/i2c_me15.c
8394
${MXM_SOURCE_DIR}/I2C/i2c_reva.c
8495

85-
${MXM_SOURCE_DIR}/SPIMSS/spimss_me11.c
86-
${MXM_SOURCE_DIR}/SPIMSS/spimss_reva.c
87-
${MXM_SOURCE_DIR}/SPIMSS/i2s_me11.c
88-
${MXM_SOURCE_DIR}/SPIMSS/i2s_reva.c
96+
${MXM_SOURCE_DIR}/I2S/i2s_me15.c
97+
${MXM_SOURCE_DIR}/I2S/i2s_reva.c
8998

9099
${MXM_SOURCE_DIR}/ICC/icc_common.c
91-
${MXM_SOURCE_DIR}/ICC/icc_me11.c
100+
${MXM_SOURCE_DIR}/ICC/icc_me15.c
92101
${MXM_SOURCE_DIR}/ICC/icc_reva.c
93102

94-
${MXM_SOURCE_DIR}/RTC/rtc_me11.c
103+
${MXM_SOURCE_DIR}/RTC/rtc_me15.c
95104
${MXM_SOURCE_DIR}/RTC/rtc_reva.c
96105

97-
${MXM_SOURCE_DIR}/SPI/spi_me11.c
106+
${MXM_SOURCE_DIR}/SPI/spi_me15.c
98107
${MXM_SOURCE_DIR}/SPI/spi_reva.c
99108

100109
${MXM_SOURCE_DIR}/TMR/tmr_common.c
101-
${MXM_SOURCE_DIR}/TMR/tmr_me11.c
102-
${MXM_SOURCE_DIR}/TMR/tmr_reva.c
110+
${MXM_SOURCE_DIR}/TMR/tmr_me15.c
111+
${MXM_SOURCE_DIR}/TMR/tmr_revb.c
112+
113+
${MXM_SOURCE_DIR}/TRNG/trng_me15.c
114+
${MXM_SOURCE_DIR}/TRNG/trng_revb.c
103115

104116
${MXM_SOURCE_DIR}/UART/uart_common.c
105-
${MXM_SOURCE_DIR}/UART/uart_me11.c
106-
${MXM_SOURCE_DIR}/UART/uart_reva.c
117+
${MXM_SOURCE_DIR}/UART/uart_me15.c
118+
${MXM_SOURCE_DIR}/UART/uart_revb.c
107119

108120
${MXM_SOURCE_DIR}/WDT/wdt_common.c
109-
${MXM_SOURCE_DIR}/WDT/wdt_me11.c
110-
${MXM_SOURCE_DIR}/WDT/wdt_reva.c
121+
${MXM_SOURCE_DIR}/WDT/wdt_me15.c
122+
${MXM_SOURCE_DIR}/WDT/wdt_revb.c
111123

112124
${STARTUP_FILE}
113125
)

‎targets/TARGET_Maxim/TARGET_MAX32670/PeripheralPins.c

Lines changed: 55 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*******************************************************************************
2-
* Copyright (c) Maxim Integrated Products, Inc., All Rights Reserved.
2+
* Copyright (c) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
33
*
44
* Permission is hereby granted, free of charge, to any person obtaining a
55
* copy of this software and associated documentation files (the "Software"),
@@ -44,75 +44,89 @@
4444
* the pointers to the "function" data members.
4545
*/
4646

47-
4847
/************I2C***************/
4948
const PinMap PinMap_I2C_SDA[] = {
50-
{ P0_9, I2C_0, 1 },
51-
{ P0_3, I2C_1, 1 },
52-
{ NC, NC, 0 }
49+
{ P0_7 , I2C_0, 1 }, // I2C0_SDA
50+
{ P0_13, I2C_1, 1 }, // I2C1_SDA
51+
{ P0_19, I2C_2, 1 }, // I2C2_SDA
52+
{ NC, NC, 0 }
5353
};
5454

5555
const PinMap PinMap_I2C_SCL[] = {
56-
{ P0_8, I2C_0, 1 },
57-
{ P0_2, I2C_1, 1 },
58-
{ NC, NC, 0 }
56+
{ P0_6, I2C_0, 1 }, // I2C0_SCL
57+
{ P0_12, I2C_1, 1 }, // I2C1_SCL
58+
{ P0_18, I2C_2, 1 }, // I2C2_SCL
59+
{ NC, NC, 0 }
5960
};
6061

62+
6163
/************UART***************/
6264
const PinMap PinMap_UART_TX[] = {
63-
{P0_4, UART_0, 2},
64-
{P0_10, UART_1, 2},
65-
{P0_0, UART_1, 3},
66-
{P0_6, UART_1, 3},
67-
{NC, NC, 0}
65+
{ P0_9 , UART_0, 1 }, // UART0A_TX
66+
{ P0_25, UART_0, 2 }, // UART0B_TX
67+
{ P0_29, UART_1, 1 }, // UART1A_TX
68+
{ P0_3, UART_1, 2 }, // UART1B_TX
69+
{ P0_15, UART_2, 2 }, // UART2B_TX
70+
{ P0_27, UART_3, 1 }, // LPUART0_TX
71+
{ NC, NC, 0 }
6872
};
6973

7074
const PinMap PinMap_UART_RX[] = {
71-
{P0_5, UART_0, 2},
72-
{P0_11, UART_1, 2},
73-
{P0_1, UART_1, 3},
74-
{P0_7, UART_1, 3},
75-
{NC, NC, 0}
75+
{ P0_8, UART_0, 1 }, // UART0A_RX
76+
{ P0_24, UART_0, 2 }, // UART0B_RX
77+
{ P0_28, UART_1, 1 }, // UART1A_RX
78+
{ P0_2, UART_1, 2 }, // UART1B_RX
79+
{ P0_14, UART_2, 2 }, // UART2B_RX
80+
{ P0_26, UART_3, 1 }, // LPUART0_RX
81+
{ NC, NC, 0 }
7682
};
7783

7884
const PinMap PinMap_UART_CTS[] = {
79-
{P0_6, UART_0, 2},
80-
{P0_12, UART_1, 2},
81-
{NC, NC, 0}
85+
{ P0_10, UART_0, 1 }, // UART0A_CTS
86+
{ P0_26, UART_0, 2 }, // UART0B_CTS
87+
{ P0_30, UART_1, 1 }, // UART1A_CTS
88+
{ P0_4, UART_1, 2 }, // UART1B_CTS
89+
{ P0_16, UART_2, 2 }, // UART2B_CTS
90+
{ P0_24, UART_3, 1 }, // LPUART0_CTS
91+
{ NC, NC, 0 }
8292
};
8393

8494
const PinMap PinMap_UART_RTS[] = {
85-
{P0_7, UART_0, 2},
86-
{P0_13, UART_1, 2},
87-
{NC, NC, 0}
95+
{ P0_11, UART_0, 1 }, // UART0A_RTS
96+
{ P0_27, UART_0, 2 }, // UART0B_RTS
97+
{ P0_31, UART_1, 1 }, // UART1A_RTS
98+
{ P0_5, UART_1, 2 }, // UART1B_RTS
99+
{ P0_17, UART_2, 2 }, // UART2B_RTS
100+
{ P0_25, UART_3, 1 }, // LPUART0_RTS
101+
{ NC, NC, 0 }
88102
};
89103

104+
90105
/************SPI***************/
91106
const PinMap PinMap_SPI_SCLK[] = {
92-
{ P0_6, SPI_0, 1 },
93-
{ P0_12, SPI_1, 1 },
94-
{ P0_2, SPI_1, 2 },
95-
{ NC, NC, 0 }
107+
{ P0_4, SPI_0, 1 }, // SPI0_SCK
108+
{ P0_16, SPI_1, 1 }, // SPI1_SCK
109+
{ P1_3, SPI_2, 1 }, // SPI2_SCK
110+
{ NC, NC, 0 }
96111
};
97112

98113
const PinMap PinMap_SPI_MOSI[] = {
99-
{ P0_5, SPI_0, 1 },
100-
{ P0_11, SPI_1, 1 },
101-
{ P0_1, SPI_1, 2 },
102-
{ NC, NC, 0 }
114+
{ P0_3, SPI_0, 1 }, // SPI0_MOSI
115+
{ P0_15, SPI_1, 1 }, // SPI1_MOSI
116+
{ P1_2, SPI_2, 1 }, // SPI2_MOSI
117+
{ NC, NC, 0 }
103118
};
104119

105120
const PinMap PinMap_SPI_MISO[] = {
106-
{ P0_4, SPI_0, 1 },
107-
{ P0_10, SPI_1, 1 },
108-
{ P0_0, SPI_1, 2 },
109-
{ NC, NC, 0 }
121+
{ P0_2, SPI_0, 1 }, // SPI0_MISO
122+
{ P0_14, SPI_1, 1 }, // SPI1_MISO
123+
{ P1_1, SPI_2, 1 }, // SPI2_MISO
124+
{ NC, NC, 0 }
110125
};
111126

112127
const PinMap PinMap_SPI_SSEL[] = {
113-
{ P0_7, SPI_0, 1 },
114-
{ P0_13, SPI_1, 1 },
115-
{ P0_3, SPI_1, 2 },
116-
{ NC, NC, 0 }
128+
{ P0_5, SPI_0, 1 }, // SPI0_SS
129+
{ P0_17, SPI_1, 1 }, // SPI1_SS
130+
{ P1_4, SPI_2, 1 }, // SPI2_SS
131+
{ NC, NC, 0 }
117132
};
118-

‎targets/TARGET_Maxim/TARGET_MAX32670/PortNames.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@ extern "C" {
4040

4141
typedef enum {
4242
Port0 = 0,
43+
Port1 = 1,
4344
} PortName;
4445

4546
#ifdef __cplusplus

‎targets/TARGET_Maxim/TARGET_MAX32670/TARGET_MAX32670EVKIT/CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# Copyright (c) 2021 ARM Limited. All rights reserved.
1+
# Copyright (c) 2022 ARM Limited. All rights reserved.
22
# SPDX-License-Identifier: Apache-2.0
33

44
add_library(mbed-max32670evkit INTERFACE)

‎targets/TARGET_Maxim/TARGET_MAX32670/TARGET_MAX32670EVKIT/PeripheralNames.h

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -43,21 +43,25 @@ extern "C" {
4343
typedef enum {
4444
UART_0 = MXC_BASE_UART0,
4545
UART_1 = MXC_BASE_UART1,
46+
UART_2 = MXC_BASE_UART2,
47+
UART_3 = MXC_BASE_UART3,
4648
#if defined(MBED_CONF_TARGET_STDIO_UART)
4749
STDIO_UART = MBED_CONF_TARGET_STDIO_UART,
4850
#else
49-
STDIO_UART = UART_1,
51+
STDIO_UART = UART_0,
5052
#endif
5153
} UARTName;
5254

5355
typedef enum {
5456
I2C_0 = MXC_BASE_I2C0,
5557
I2C_1 = MXC_BASE_I2C1,
58+
I2C_2 = MXC_BASE_I2C2,
5659
} I2CName;
5760

5861
typedef enum {
59-
SPI_0 = MXC_BASE_SPI,
60-
SPI_1 = MXC_BASE_SPIMSS,
62+
SPI_0 = MXC_BASE_SPI0,
63+
SPI_1 = MXC_BASE_SPI1,
64+
SPI_2 = MXC_BASE_SPI2,
6165
} SPIName;
6266

6367

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