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Merge pull request #14743 from OpenNuvoton/nuvoton_m251_m261_wdt
Nuvoton: Support watchdog on M251/M261 series
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‎targets/TARGET_NUVOTON/TARGET_M251/CMakeLists.txt

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sleep.c
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spi_api.c
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us_ticker.c
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watchdog_api.c
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)
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target_include_directories(mbed-m251

‎targets/TARGET_NUVOTON/TARGET_M251/watchdog_api.c

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/*
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* Copyright (c) 2019-2020 Nuvoton Technology Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "watchdog_api.h"
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#if DEVICE_WATCHDOG
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#include "cmsis.h"
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/* Watchdog clock per second */
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#if MBED_CONF_TARGET_LXT_PRESENT
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#define NU_WDTCLK_PER_SEC (__LXT)
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#define NU_WDTCLK_PER_SEC_MAX (__LXT)
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#define NU_WDTCLK_PER_SEC_MIN (__LXT)
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#else
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#define NU_WDTCLK_PER_SEC (__LIRC)
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#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 1.15f))
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#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.85f))
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#endif
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/* Convert watchdog clock to nearest ms */
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#define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC))
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/* Convert ms to nearest watchdog clock */
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#define NU_MS2WDTCLK(MS) (((MS) * (NU_WDTCLK_PER_SEC) + 500) / 1000)
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/* List of hardware-supported watchdog timeout in clocks */
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#define NU_WDT_16CLK 16
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#define NU_WDT_64CLK 64
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#define NU_WDT_256CLK 256
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#define NU_WDT_1024CLK 1024
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#define NU_WDT_4096CLK 4096
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#define NU_WDT_16384CLK 16384
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#define NU_WDT_65536CLK 65536
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#define NU_WDT_262144CLK 262144
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/* Watchdog reset delay
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*
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* 1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading.
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* 2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance.
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*/
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#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_130CLK
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/* Support watchdog timeout values beyond H/W
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*
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* Watchdog Timer H/W just supports timeout values of 2^4, 2^6, ..., 2^18 clocks.
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* To extend the support range to 1 and UINT32_MAX, we cascade multiple small timeouts to
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* reach one large timeout specified in hal_watchdog_init.
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*/
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/* Track if WDT H/W has been initialized */
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static bool wdt_hw_inited = 0;
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/* Hold initially-configured timeout in hal_watchdog_init */
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static uint32_t wdt_timeout_reload_ms = 0;
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/* Track remaining timeout for cascading */
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static uint32_t wdt_timeout_rmn_clk = 0;
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static void watchdog_setup_cascade_timeout(void);
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static void WDT_IRQHandler(void);
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watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
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{
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/* Check validity of arguments */
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if (! config || ! config->timeout_ms) {
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return WATCHDOG_STATUS_INVALID_ARGUMENT;
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}
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wdt_timeout_reload_ms = config->timeout_ms;
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wdt_timeout_rmn_clk = NU_MS2WDTCLK(wdt_timeout_reload_ms);
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if (! wdt_hw_inited) {
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wdt_hw_inited = 1;
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SYS_UnlockReg();
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/* Enable IP module clock */
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CLK_EnableModuleClock(WDT_MODULE);
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/* Select IP clock source */
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#if MBED_CONF_TARGET_LXT_PRESENT
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CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LXT, 0);
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#else
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CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
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#endif
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SYS_LockReg();
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/* Set up IP interrupt */
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NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
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NVIC_EnableIRQ(WDT_IRQn);
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}
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watchdog_setup_cascade_timeout();
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return WATCHDOG_STATUS_OK;
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}
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void hal_watchdog_kick(void)
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{
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/* If a watchdog is not running, this function does nothing */
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if (!(WDT->CTL & WDT_CTL_WDTEN_Msk)) {
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return;
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}
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wdt_timeout_rmn_clk = NU_MS2WDTCLK(wdt_timeout_reload_ms);
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watchdog_setup_cascade_timeout();
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}
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watchdog_status_t hal_watchdog_stop(void)
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{
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SYS_UnlockReg();
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/* Clear all flags & Disable interrupt & Disable WDT */
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WDT->CTL = (WDT->CTL & ~(WDT_CTL_WDTEN_Msk | WDT_CTL_INTEN_Msk)) | (WDT_CTL_WKF_Msk | WDT_CTL_IF_Msk | WDT_CTL_RSTF_Msk);
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SYS_LockReg();
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return WATCHDOG_STATUS_OK;
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}
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uint32_t hal_watchdog_get_reload_value(void)
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{
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return wdt_timeout_reload_ms;
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}
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watchdog_features_t hal_watchdog_get_platform_features(void)
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{
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watchdog_features_t wdt_feat;
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/* We can support timeout values between 1 and UINT32_MAX by cascading. */
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wdt_feat.max_timeout = UINT32_MAX;
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/* Support re-configuring watchdog timer */
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wdt_feat.update_config = 1;
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/* Support stopping watchdog timer */
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wdt_feat.disable_watchdog = 1;
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/* Typical frequency of not calibrated watchdog clock in Hz */
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wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC;
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/* Maximum frequency of not calibrated watchdog clock in Hz */
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wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX;
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return wdt_feat;
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}
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static void watchdog_setup_cascade_timeout(void)
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{
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uint32_t wdt_timeout_clk_toutsel;
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if (wdt_timeout_rmn_clk >= NU_WDT_262144CLK) {
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wdt_timeout_rmn_clk -= NU_WDT_262144CLK;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW18;
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} else if (wdt_timeout_rmn_clk >= NU_WDT_65536CLK) {
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wdt_timeout_rmn_clk -= NU_WDT_65536CLK;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW16;
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} else if (wdt_timeout_rmn_clk >= NU_WDT_16384CLK) {
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wdt_timeout_rmn_clk -= NU_WDT_16384CLK;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW14;
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} else if (wdt_timeout_rmn_clk >= NU_WDT_4096CLK) {
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wdt_timeout_rmn_clk -= NU_WDT_4096CLK;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW12;
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} else if (wdt_timeout_rmn_clk >= NU_WDT_1024CLK) {
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wdt_timeout_rmn_clk -= NU_WDT_1024CLK;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW10;
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} else if (wdt_timeout_rmn_clk >= NU_WDT_256CLK) {
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wdt_timeout_rmn_clk -= NU_WDT_256CLK;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW8;
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} else if (wdt_timeout_rmn_clk >= NU_WDT_64CLK) {
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wdt_timeout_rmn_clk -= NU_WDT_64CLK;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW6;
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} else if (wdt_timeout_rmn_clk >= NU_WDT_16CLK) {
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wdt_timeout_rmn_clk -= NU_WDT_16CLK;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW4;
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} else if (wdt_timeout_rmn_clk) {
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wdt_timeout_rmn_clk = 0;
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wdt_timeout_clk_toutsel = WDT_TIMEOUT_2POW4;
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} else {
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/* WDT has timed-out and will restart system soon. We just disable interrupt to escape
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* getting stuck in WDT ISR. */
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SYS_UnlockReg();
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/* Clear all flags & Disable interrupt */
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WDT->CTL = (WDT->CTL & ~WDT_CTL_INTEN_Msk) | (WDT_CTL_WKF_Msk | WDT_CTL_IF_Msk | WDT_CTL_RSTF_Msk);
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SYS_LockReg();
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return;
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}
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SYS_UnlockReg();
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/* Configure reset delay on timeout */
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WDT->ALTCTL = NU_WDT_RESET_DELAY_RSTDSEL;
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/* Reset watchdog timer */
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WDT_RESET_COUNTER();
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/* Configure another piece of cascaded WDT timeout */
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WDT->CTL = wdt_timeout_clk_toutsel | // Timeout interval
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WDT_CTL_WDTEN_Msk | // Enable watchdog timer
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WDT_CTL_INTEN_Msk | // Enable interrupt
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WDT_CTL_WKF_Msk | // Clear wake-up flag
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WDT_CTL_WKEN_Msk | // Enable wake-up on timeout
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WDT_CTL_IF_Msk | // Clear interrupt flag
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WDT_CTL_RSTF_Msk | // Clear reset flag
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WDT_CTL_RSTEN_Msk; // Enable reset always to address cascaded timeout failure in interrupt disabled scenario e.g. Hard Fault
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SYS_LockReg();
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}
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void WDT_IRQHandler(void)
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{
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/* Check WDT interrupt flag */
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if (WDT_GET_TIMEOUT_INT_FLAG()) {
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/* Continue another piece of cascaded WDT timeout */
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watchdog_setup_cascade_timeout();
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} else {
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/* Clear all flags */
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WDT->CTL |= (WDT_CTL_WKF_Msk | WDT_CTL_IF_Msk | WDT_CTL_RSTF_Msk);
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}
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}
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#endif

‎targets/TARGET_NUVOTON/TARGET_M261/CMakeLists.txt

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spi_api.c
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trng_api.cpp
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us_ticker.c
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watchdog_api.c
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crypto/crypto-misc.cpp
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)

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