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| 1 | +/* mbed Microcontroller Library |
| 2 | + * Copyright (c) 2015-2022 Nuvoton |
| 3 | + * |
| 4 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | + * you may not use this file except in compliance with the License. |
| 6 | + * You may obtain a copy of the License at |
| 7 | + * |
| 8 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | + * |
| 10 | + * Unless required by applicable law or agreed to in writing, software |
| 11 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | + * See the License for the specific language governing permissions and |
| 14 | + * limitations under the License. |
| 15 | + */ |
| 16 | + |
| 17 | + #include "can_api.h" |
| 18 | + #include "m261_gpio.h" |
| 19 | + #include "m261_can.h" |
| 20 | + |
| 21 | + #if DEVICE_CAN |
| 22 | + #include <string.h> |
| 23 | + #include "cmsis.h" |
| 24 | + #include "pinmap.h" |
| 25 | + #include "PeripheralPins.h" |
| 26 | + #include "nu_modutil.h" |
| 27 | + #include "nu_miscutil.h" |
| 28 | + #include "nu_bitutil.h" |
| 29 | + #include "mbed_critical.h" |
| 30 | + |
| 31 | + #define NU_CAN_DEBUG 0 |
| 32 | + #define CAN_NUM 1 |
| 33 | + |
| 34 | + static uintptr_t can_irq_contexts[CAN_NUM] = {0}; |
| 35 | + static can_irq_handler can0_irq_handler; |
| 36 | + |
| 37 | + |
| 38 | + static const struct nu_modinit_s can_modinit_tab[] = { |
| 39 | + {CAN_0, CAN0_MODULE, 0, 0, CAN0_RST, CAN0_IRQn, NULL}, |
| 40 | + |
| 41 | + {NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL} |
| 42 | +}; |
| 43 | + |
| 44 | + |
| 45 | +void can_init_freq(can_t *obj, PinName rd, PinName td, int hz) |
| 46 | +{ |
| 47 | + uint32_t can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD); |
| 48 | + uint32_t can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD); |
| 49 | + obj->can = (CANName)pinmap_merge(can_td, can_rd); |
| 50 | + MBED_ASSERT((int)obj->can != NC); |
| 51 | + |
| 52 | + const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab); |
| 53 | + MBED_ASSERT(modinit != NULL); |
| 54 | + MBED_ASSERT(modinit->modname == (int)obj->can); |
| 55 | + |
| 56 | + obj->pin_rd = rd; |
| 57 | + obj->pin_td = td; |
| 58 | + |
| 59 | + pinmap_pinout(td, PinMap_CAN_TD); |
| 60 | + pinmap_pinout(rd, PinMap_CAN_RD); |
| 61 | + |
| 62 | + // Enable IP clock |
| 63 | + CLK_EnableModuleClock(modinit->clkidx); |
| 64 | + |
| 65 | + // Reset this module |
| 66 | + SYS_ResetModule(modinit->rsetidx); |
| 67 | + |
| 68 | + // Disable IRQ |
| 69 | + NVIC_DisableIRQ(CAN0_IRQn); |
| 70 | + |
| 71 | + obj->index = 0; |
| 72 | + |
| 73 | + /* For M263 mbed Board Transmitter Setting (RS Pin) */ |
| 74 | + GPIO_SetMode(PG, BIT2| BIT3, GPIO_MODE_OUTPUT); |
| 75 | + PG2 = 0x00; |
| 76 | + PG3 = 0x00; |
| 77 | + |
| 78 | + CAN_Open((CAN_T *)NU_MODBASE(obj->can), hz, CAN_NORMAL_MODE); |
| 79 | + |
| 80 | + can_filter(obj, 0, 0, CANStandard, 0); |
| 81 | +} |
| 82 | + |
| 83 | + |
| 84 | +void can_init(can_t *obj, PinName rd, PinName td) |
| 85 | +{ |
| 86 | + can_init_freq(obj, rd, td, 500000); |
| 87 | +} |
| 88 | + |
| 89 | + |
| 90 | +void can_free(can_t *obj) |
| 91 | +{ |
| 92 | + |
| 93 | + const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab); |
| 94 | + |
| 95 | + MBED_ASSERT(modinit != NULL); |
| 96 | + MBED_ASSERT(modinit->modname == (int)obj->can); |
| 97 | + |
| 98 | + // Reset this module |
| 99 | + SYS_ResetModule(modinit->rsetidx); |
| 100 | + |
| 101 | + CLK_DisableModuleClock(modinit->clkidx); |
| 102 | + |
| 103 | + /* Free up pins */ |
| 104 | + gpio_set(obj->pin_rd); |
| 105 | + gpio_set(obj->pin_td); |
| 106 | + obj->pin_rd = NC; |
| 107 | + obj->pin_td = NC; |
| 108 | +} |
| 109 | + |
| 110 | +int can_frequency(can_t *obj, int hz) |
| 111 | +{ |
| 112 | + CAN_SetBaudRate((CAN_T *)NU_MODBASE(obj->can), hz); |
| 113 | + |
| 114 | + return CAN_GetCANBitRate((CAN_T *)NU_MODBASE(obj->can)); |
| 115 | +} |
| 116 | + |
| 117 | +static void can_irq(CANName name, int id) |
| 118 | +{ |
| 119 | + |
| 120 | + CAN_T *can = (CAN_T *)NU_MODBASE(name); |
| 121 | + uint32_t u8IIDRstatus; |
| 122 | + |
| 123 | + u8IIDRstatus = can->IIDR; |
| 124 | + |
| 125 | + if(u8IIDRstatus == 0x00008000) { /* Check Status Interrupt Flag (Error status Int and Status change Int) */ |
| 126 | + /**************************/ |
| 127 | + /* Status Change interrupt*/ |
| 128 | + /**************************/ |
| 129 | + if(can->STATUS & CAN_STATUS_RXOK_Msk) { |
| 130 | + can->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/ |
| 131 | + can0_irq_handler(can_irq_contexts[id], IRQ_RX); |
| 132 | + } |
| 133 | + |
| 134 | + if(can->STATUS & CAN_STATUS_TXOK_Msk) { |
| 135 | + can->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/ |
| 136 | + can0_irq_handler(can_irq_contexts[id], IRQ_TX); |
| 137 | + } |
| 138 | + |
| 139 | + /**************************/ |
| 140 | + /* Error Status interrupt */ |
| 141 | + /**************************/ |
| 142 | + if(can->STATUS & CAN_STATUS_EWARN_Msk) { |
| 143 | + can0_irq_handler(can_irq_contexts[id], IRQ_ERROR); |
| 144 | + } |
| 145 | + |
| 146 | + if(can->STATUS & CAN_STATUS_BOFF_Msk) { |
| 147 | + can0_irq_handler(can_irq_contexts[id], IRQ_BUS); |
| 148 | + } |
| 149 | + } else if (u8IIDRstatus!=0) { |
| 150 | + |
| 151 | + can0_irq_handler(can_irq_contexts[id], IRQ_OVERRUN); |
| 152 | + |
| 153 | + CAN_CLR_INT_PENDING_BIT(can, ((can->IIDR) -1)); /* Clear Interrupt Pending */ |
| 154 | + |
| 155 | + } else if(can->WU_STATUS == 1) { |
| 156 | + |
| 157 | + can->WU_STATUS = 0; /* Write '0' to clear */ |
| 158 | + can0_irq_handler(can_irq_contexts[id], IRQ_WAKEUP); |
| 159 | + } |
| 160 | +} |
| 161 | + |
| 162 | +void CAN0_IRQHandler(void) |
| 163 | +{ |
| 164 | + can_irq(CAN_0, 0); |
| 165 | +} |
| 166 | + |
| 167 | +void can_irq_init(can_t *obj, can_irq_handler handler, uintptr_t context) |
| 168 | +{ |
| 169 | + can0_irq_handler = handler; |
| 170 | + can_irq_contexts[obj->index] = context; |
| 171 | +} |
| 172 | + |
| 173 | +void can_irq_free(can_t *obj) |
| 174 | +{ |
| 175 | + CAN_DisableInt((CAN_T *)NU_MODBASE(obj->can), (CAN_CON_IE_Msk|CAN_CON_SIE_Msk|CAN_CON_EIE_Msk)); |
| 176 | + |
| 177 | + can_irq_contexts[obj->index] = 0; |
| 178 | + |
| 179 | + NVIC_DisableIRQ(CAN0_IRQn); |
| 180 | +} |
| 181 | + |
| 182 | +void can_irq_set(can_t *obj, CanIrqType irq, uint32_t enable) |
| 183 | +{ |
| 184 | + CAN_T *can_base = (CAN_T *) NU_MODBASE(obj->can); |
| 185 | + |
| 186 | + CAN_EnterInitMode(can_base, ((enable != 0 )? CAN_CON_IE_Msk :0) ); |
| 187 | + |
| 188 | + |
| 189 | + switch (irq) |
| 190 | + { |
| 191 | + case IRQ_ERROR: |
| 192 | + case IRQ_BUS: |
| 193 | + case IRQ_PASSIVE: |
| 194 | + can_base->CON = can_base->CON |CAN_CON_EIE_Msk; |
| 195 | + can_base->CON = can_base->CON |CAN_CON_SIE_Msk; |
| 196 | + break; |
| 197 | + |
| 198 | + case IRQ_RX: |
| 199 | + case IRQ_TX: |
| 200 | + case IRQ_OVERRUN: |
| 201 | + case IRQ_WAKEUP: |
| 202 | + can_base->CON = can_base->CON |CAN_CON_SIE_Msk; |
| 203 | + break; |
| 204 | + |
| 205 | + default: |
| 206 | + break; |
| 207 | + |
| 208 | + } |
| 209 | + |
| 210 | + CAN_LeaveInitMode(can_base); |
| 211 | + |
| 212 | + NVIC_SetVector(CAN0_IRQn, (uint32_t)&CAN0_IRQHandler); |
| 213 | + NVIC_EnableIRQ(CAN0_IRQn); |
| 214 | + |
| 215 | +} |
| 216 | + |
| 217 | +int can_write(can_t *obj, CAN_Message msg, int cc) |
| 218 | +{ |
| 219 | + STR_CANMSG_T CMsg; |
| 220 | + |
| 221 | + CMsg.IdType = (uint32_t)msg.format; |
| 222 | + CMsg.FrameType = (uint32_t)!msg.type; |
| 223 | + CMsg.Id = msg.id; |
| 224 | + CMsg.DLC = msg.len; |
| 225 | + memcpy((void *)&CMsg.Data[0],(const void *)&msg.data[0], (unsigned int)8); |
| 226 | + |
| 227 | + return CAN_Transmit((CAN_T *)NU_MODBASE(obj->can), cc, &CMsg); |
| 228 | +} |
| 229 | + |
| 230 | +int can_read(can_t *obj, CAN_Message *msg, int handle) |
| 231 | +{ |
| 232 | + STR_CANMSG_T CMsg; |
| 233 | + |
| 234 | + if(!CAN_Receive((CAN_T *)NU_MODBASE(obj->can), handle, &CMsg)) |
| 235 | + return 0; |
| 236 | + |
| 237 | + msg->format = (CANFormat)CMsg.IdType; |
| 238 | + msg->type = (CANType)!CMsg.FrameType; |
| 239 | + msg->id = CMsg.Id; |
| 240 | + msg->len = CMsg.DLC; |
| 241 | + memcpy(&msg->data[0], &CMsg.Data[0], 8); |
| 242 | + |
| 243 | + return 1; |
| 244 | +} |
| 245 | + |
| 246 | +int can_mode(can_t *obj, CanMode mode) |
| 247 | +{ |
| 248 | + CAN_T *can_base = (CAN_T *) NU_MODBASE(obj->can); |
| 249 | + |
| 250 | + int success = 0; |
| 251 | + switch (mode) |
| 252 | + { |
| 253 | + case MODE_RESET: |
| 254 | + CAN_LeaveTestMode(can_base); |
| 255 | + success = 1; |
| 256 | + break; |
| 257 | + |
| 258 | + case MODE_NORMAL: |
| 259 | + CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk); |
| 260 | + success = 1; |
| 261 | + break; |
| 262 | + |
| 263 | + case MODE_SILENT: |
| 264 | + CAN_EnterTestMode(can_base, CAN_TEST_SILENT_Msk); |
| 265 | + success = 1; |
| 266 | + break; |
| 267 | + |
| 268 | + case MODE_TEST_LOCAL: |
| 269 | + case MODE_TEST_GLOBAL: |
| 270 | + CAN_EnterTestMode(can_base, CAN_TEST_LBACK_Msk); |
| 271 | + success = 1; |
| 272 | + break; |
| 273 | + |
| 274 | + case MODE_TEST_SILENT: |
| 275 | + CAN_EnterTestMode(can_base, CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk); |
| 276 | + success = 1; |
| 277 | + break; |
| 278 | + |
| 279 | + default: |
| 280 | + success = 0; |
| 281 | + break; |
| 282 | + |
| 283 | + } |
| 284 | + |
| 285 | + |
| 286 | + return success; |
| 287 | +} |
| 288 | + |
| 289 | +int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) |
| 290 | +{ |
| 291 | + uint32_t numask = mask; |
| 292 | + if( numask == 0x0000 ) |
| 293 | + { |
| 294 | + return CAN_SetRxMsg((CAN_T *)NU_MODBASE(obj->can), handle, (uint32_t)format, id); |
| 295 | + } |
| 296 | + if( format == CANStandard ) |
| 297 | + { |
| 298 | + numask = (mask << 18); |
| 299 | + } |
| 300 | + numask = (numask | CAN_IF_MASK2_MDIR_Msk | CAN_IF_MASK2_MXTD_Msk); |
| 301 | + return CAN_SetRxMsgAndMsk((CAN_T *)NU_MODBASE(obj->can), handle, (uint32_t)format, id, numask); |
| 302 | +} |
| 303 | + |
| 304 | + |
| 305 | +void can_reset(can_t *obj) |
| 306 | +{ |
| 307 | + const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab); |
| 308 | + |
| 309 | + MBED_ASSERT(modinit != NULL); |
| 310 | + MBED_ASSERT(modinit->modname == obj->can); |
| 311 | + |
| 312 | + // Reset this module |
| 313 | + SYS_ResetModule(modinit->rsetidx); |
| 314 | + |
| 315 | +} |
| 316 | + |
| 317 | +unsigned char can_rderror(can_t *obj) |
| 318 | +{ |
| 319 | + CAN_T *can = (CAN_T *)NU_MODBASE(obj->can); |
| 320 | + return ((can->ERR>>8)&0xFF); |
| 321 | +} |
| 322 | + |
| 323 | +unsigned char can_tderror(can_t *obj) |
| 324 | +{ |
| 325 | + CAN_T *can = (CAN_T *)NU_MODBASE(obj->can); |
| 326 | + return ((can->ERR)&0xFF); |
| 327 | +} |
| 328 | + |
| 329 | +void can_monitor(can_t *obj, int silent) |
| 330 | +{ |
| 331 | + CAN_EnterTestMode((CAN_T *)NU_MODBASE(obj->can), CAN_TEST_SILENT_Msk); |
| 332 | +} |
| 333 | + |
| 334 | +const PinMap *can_rd_pinmap() |
| 335 | +{ |
| 336 | + return PinMap_CAN_TD; |
| 337 | +} |
| 338 | + |
| 339 | +const PinMap *can_td_pinmap() |
| 340 | +{ |
| 341 | + return PinMap_CAN_RD; |
| 342 | +} |
| 343 | + |
| 344 | +#endif // DEVICE_CAN |
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